OVERVIEW OF RECENT SUPERCOMPUTERS
In this report we give an overview of high-performance computers which are
currently available or will become available within a short time frame from
vendors; no attempt is made to list all machines that are still in the
development phase. The machines are described according to their
macro-architectural class. Shared and distributed-memory SIMD an MIMD machines
are discerned. The information about each machine is kept as compact as
possible. Moreover, no attempt is made to quote price information as this is
often even more elusive than the performance of a system. In addition, some
general information about high-performance computer architectures and the
various processors and communication networks employed in these systems is given
in order to better appreciate the systems information given in this report.
This document reflects the technical state of the supercomputer arena
as accurately as possible. However, the author nor SURFsara take any
responsibility for errors or mistakes in this document. We encourage
anyone who has comments or remarks on the contents to inform us, so we
can improve this report.
INTRODUCTION AND ACCOUNT
This is the 23nd edition of a report in which we attempt to give
an overview of high-performance computer systems that are commercially
available or are expected to become available within a short time frame
(typically a few months to half a year). We choose the expression "attempt"
deliberately because the market of high-performance machines is highly
volatile: the rate with which systems are introduced — and disappear again
— is high (although not as high as a few years ago) and therefore the
information may be only approximately valid. Nevertheless, we think that such
an overview is useful for those who want to obtain a general idea about the
various means by which these systems strive at high-performance, especially
when it is updated on a regular basis.
We will try to be as up-to-date and compact as possible and on these grounds we
think there is a place for this report. Generally speaking, integrated parallel
systems have for the most part given away to clustered systems. Indeed, it
becomes hard to distinguish between them these days as many features that set
integrated systems apart from clusters appear in the latter systems and
characteristics present in clusters are now present iin what used to be called
integrated parallel sytems. It has become all the more clear that no one
processor type is best for all possible types of computation. So, a trend is
emerging of diversifying processor types within a single system. A first sign of
this is the appearance of FPGAs, high-end graphical cards and other computation
accelerators in systems with standard processors. We may expect that this trend
will continue in the coming years which will make the high-performance computer
landscape more diverse and interesting and harder to exploit efficiently.
The majority of systems still look like minor variations on the same theme:
clusters of RISC(EPIC)-based Symmetric Multi-Processing (SMP) nodes which in
turn are connected by a fast network. Culler Culler et.al., [7] consider this as a
natural architectural evolution. However, it may also be argued that economic
pressure has steered the systems in this direction, thus letting the High
Performance Computing world take advantage of the mainstream technology
developed for the mass market.
The supercomputer market is a very dynamic one and this is especially true for
the cluster world that have emerged at a tremendous rate in the last 10 years.
The number of vendors that sell pre-configured clusters has boomed accordingly
and, as for the last few issues, we have decided not to include such
configurations in this report: the speed with which cluster companies and
systems appear and disappear makes this almost impossible. We will, however,
comment on cluster characteristics and their position relative to other
supercomputers in section Clusters .
For the tightly-coupled or "integrated" parallel systems, however,
we can by updating this report at least follow the main trends in
popular and emerging architectures. The details of the systems to be
reported make this a rather bulky document.
For some years already we include sections about important system components in
order to better appreciate the systems described later: processors in section Processors, networks in section
Interconnects, and computational accelerators in section Accelerators. This information is sometimes
somewhat sketchy because of scant vendor information but nevertheless on average
it gives a fair idea of the components' properties.
The rule for including systems is as follows: they should be either available
commercially at the time of appearance of this report, or within 6 months
thereafter. This excludes some interesting systems at various places in
the world (all with measured performances in the range of
Pflop/s), the Tianhe-2 system (with a measured performance of around 33
Pflop/s), and some accelerator-enhanced clusters with speeds of several
Pflop/s. The Tianhe-2 is a one-of-a-kind system, while the clusters mentioned
are of various makings with standard components and as such no systems that are
sold as ready-made products.
The rule that systems should be available within a time-span of 6
months is to avoid confusion by describing systems that are announced
much too early, just for marketing reasons and that will not be
available to general users within a reasonable time. We also have to
refrain from including all generations of a system that are still in
use. Therefore, for instance, we do not include the euarler IBM SP or the Cray
X{1,2} series anymore although some of these systems are still in use.
Generally speaking, we include machines that are presently marketed or
will be marketed within 6 months. To add to the information given in
this report, we quote the Web addresses of the vendors because the
information found there may be more recent than what can be provided
here. On the other hand, such pages should be read with care because it
will not always be clear what the status is of the products described
there.
Some vendors offer systems that are identical in all respects except in
the clock cycle of the nodes. In these cases we always only mention the
models with the fastest clock as it will be always possible to get the
slower systems and we presume that the reader is primarily interested
in the highest possible speeds that can be reached with these systems.
The systems described are listed alphabetically. In the header of each system
description the machine type is provided. There is referred to the architectural
class for as far this is relevant. We omit price information which in most cases
is next to useless. If available, we will give some information about
performances of systems based on user experiences instead of only giving
theoretical peak performances. Here we have adhered to the following policy: We
try to quote best measured performances, if available, thus providing a
more realistic upper bound than the theoretical peak performance. We hardly have
to say that the speed range of supercomputers is enormous, so the best measured
performance will not always reflect the performance of the reader's favorite
application. In fact, when the HPC Linpack test is used to measure the speed it
is almost certain that for the average user the application performance will be
significantly lower. When we give performance information, it is not always
possible to quote all sources and in any case if this information seems (or is)
biased, this is entirely the responsibility of the author of this report. He is
quite willing to be corrected or to receive additional information from anyone
who is in the position to do so.
Although for the average user the appearance of new systems in the last years
tended to become rapidly more and more alike, it is still useful to dwell a
little on the architectural classes that underlie this appearance. It gives
some insight in the various ways that high-performance is achieved and a
feeling why machines perform as they do. This is done in section architecture which will be referred to repeatedly
in sections that describe the various systems.
Up till the 10th issue we included a section
Systems disappeared from the list on
systems that disappeared from the market. We reduced that section
in the printed and PostScript/PDF versions because it tends to
take an unreasonable part of the total text. Still, because this
information is of interest to a fair amount of readers and it gives
insight in the field of the historical development of supercomputing
over the last 20 years, this information will still be available in
full in the afore mentioned section. In
section Systems under development we present some systems that are under development
and have a fair chance to appear on the market. Because of the addition
of the section on processors that introduces many technical terms, also
a glossary is included.
The overview given in this report concentrates on the computational capabilities
of the systems discussed. To do full justice to all assets of present days
high-performance computers one should list their I/O performance and their
connectivity possibilities as well. However, the possible permutations of
configurations even for one model of a certain system often are so large that
they would multiply the volume of this report. So, not all features of the
systems discussed will be present. We also omit systems that may be
characterised as "high-performance" in the fields of database management,
real-time computing, or visualisation, scientific and technical computing being
our primary interest. Still we think (and certainly hope) that the impressions
obtained from the entries of the individual machines may be useful to many.
Furthermore, we have set a threshold of about 20 Tflop/s for systems to appear
in this report as, at least with regard to theoretical peak performance, single
CPUs often exceed 5 Gflop/s although their actual performance may be an entirely
other matter.
Although most terms will be familiar to many readers, we still think it
is worthwhile to give some of the definitions in section
archictecture section
because some authors tend to give them a meaning that may slightly
differ from the idea the reader already has acquired.
From the 16th on we will attempt to keep the web version
up-to-date by refreshing the contents more frequently than once a year. So, the
printed version may lag a little behind the web version over the year.
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